For project submission and automatic grading, we are running a dedicated server at http://sys.snu.ac.kr. If you want to access the sys server outside of the SNU campus, please send a mail to the instructor.
Project #4: A 3-Stage Pipelined RISC-V Simulator
The goal of this project is to understand how a pipelined processor works. You need to build a 3-stage pipelined RISC-V simulator called “snurisc3” in Python that supports most of RV32I base instruction set.
- Project specification and skeleton code available here
- Due date: 11:59PM, December 10.
Project #3: RISC-V Assembly Programming
The goal of this project is to give you an opportunity to practice RISC-V assembly programming. In addition, this project introduces various RISC-V tools that help you compile and run your RISC-V programs.
- Project specification and skeleton code available here
- Due date: 11:59PM, November 10.
Project #2: Half-precision Floating Points
The goal of this project is to get familiar with the floating-point representation by implementing the 16-bit half-precision floating-point representation.
- Project specification and skeleton code available here
- Due date: 11:59PM, October 21.
Project #1: 64-bit Integer Arithmetic using 32-bit Operations
The purpose of this project is to become more familiar with the binary representation of integers and to understand the arithmetic operations between two integers. Another goal is to make your Linux or MacOS development environment ready and to get familiar with our project submission server.
- Project specification and skeleton code available here
- Due date: 11:59PM, September 22.