For project submission and automatic grading, we are running a dedicated server at http://sys.snu.ac.kr. If you want to access the sys server outside of the SNU campus, please send a mail to the TAs at snucsl.ta AT gmail.
Project #4: A 6-stage Pipelined RISC-V Simulator
The goal of this project is to understand how a pipelined processor works. You need to build a 6-stage pipelined RISC-V simulator called snurisc6 in Python that supports the most of RV32I base instruction set.
- Project specification and skeleton code available here
- Due date: 11:59PM, December 18 (Saturday).
Project #3: Image Convolution in the RISC-V Assembly Language
In this project, you will implement an image convolution routine using the 32-bit RISC-V (RV32I) assembly language. An image file in the BMP format will be given as an input. The goal of this project is to give you an opportunity to practice the RISC-V assembly programming. In addition, this project introduces various RISC-V tools that help you compile and run your RISC-V programs.
- Project specification and skeleton code available here
- Due date: 11:59PM, November 14 (Sunday).
Project #2: FP10 Representation
The goal of this project is to get familiar with the IEEE 754 floating-point standard by implementing a 10-bit floating-point representation (fp10 for short).
- Project specification and skeleton code available here
- Due date: 11:59PM, October 17 (Sunday).
Project #1: Run-length Encoding
In this project, you need to perform a variant of run-length encoding to the given array of bytes in memory. The purpose of this project is to make you familiar with the binary representations of strings/integers and the logical operations supported in the C programming language. Another goal is to make your Linux or MacOS development environment ready and to get familiar with our project submission server.
- Project specification and skeleton code available here
- Due date: 11:59PM, September 26 (Sunday).